Universal Flash Storage (UFS) is a Flash memory system defined by the Joint Electron Device Engineering Council (JEDEC) standard, designed for high data transfer speed and low power consumption. Correspondingly, UFS is well-suited for mobile applications (e.g., mobile phones, laptop computers, handheld devices, tablets, etc.) where high performance demands are seen in conjunction with low power consumption requirements. A UFS memory system may be an embedded device within a host such as a processor or system on chip (SoC), or may be integrated on a removable card, for flexible use with different hosts. Different standards and configurations may be applicable to the available UFS memory systems.
For example, UFS memory systems as well as their interfaces to the hosts may include multiple layers to support the standards. The host may include a Host Controller Interface (HCI) and a UFS Transport Protocol (UTP) as defined in the JEDEC standard, as well as a Unified Protocol (Unipro) and a physical interface referred to as M-PHY as defined by the Mobile Industry Processor Interface (MIPI) alliance. Within the host, the Unipro and the M-PHY are designed to communicate through an interface or bus referred to as a Reference M-PHY MODULE Interface (RMMI), which is also defined in the MIPI standard.
The UFS memory system which communicates with the host may also include counterpart layers, UTP, Unipro, and M-PHY. Each M-PHY supports a specific number of bits or pins, referred to in units of lanes. Depending on particular implementations, a UFS device may support one or more lanes. An embedded UFS is usually a single lane device, but there is an increasing demand in the art for embedded UFS devices which support two lanes. A UFS card is typically a removable device, and supports a single lane of memory traffic.
In conventional implementations, a host which is configured to support UFS devices of different lanes (e.g., a 2-lane embedded UFS and a 1-lane UFS card) is integrated with dedicated hardware support for the different lanes of the UFS devices which are supported. Thus, in a conventional implementation, there is a lack of efficient sharing of hardware/logic on the host, and correspondingly, conventional implementations suffer from duplication of hardware and accompanying higher costs.
Accordingly, there is a corresponding need in the art for reducing costs and promoting efficient sharing and utilization of hardware to support the different types of UFS memory systems which may have different hardware including different number of lanes.